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19-2634; Rev 0; 10/02
2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan
General Description
The MAX6958/MAX6959 compact multiplexed common-cathode display drivers interface microprocessors to seven-segment numeric LED digits, or discrete LEDs through an SMBusTM- and I2C-compatible 2-wire serial interface. The 2-wire serial interface uses fixed 0.8V/2.1V logic thresholds for compatibility with 2.5V and 3.3V systems when the display driver is powered from a 5V supply. The MAX6958/MAX6959 drive up to four 7-segment digits, with decimal points, plus four discrete LEDs, or four 7-segment digits and eight discrete LEDs if the digits' decimal points are not used, or up to 36 discrete LEDs. The MAX6959 also includes two input ports, one or both of which may be configured as a key-switch reader, which automatically scans and debounces a matrix of up to eight switches. Key-switch status is obtained by polling internal status registers or by configuring the MAX6959 interrupt output. Other on-chip features include a hexadecimal font for seven-segment displays, multiplex scan circuitry, anode and cathode drivers, and static RAM that stores each digit. The peak segment current for the display digits is set internally to 23mA. Display intensity is adjusted using a 64-step internal digital brightness control. The MAX6958/MAX6959 include a low-power shutdown mode, a scan-limit register that allows the user to display from one to four digits, and a test mode, which forces all LEDs on. The LED drivers are slew-rate-limited to reduce EMI. The MAX6958/MAX6959 are available in 16-pin PDIP and QSOP packages and are fully specified over the -40C to +125C automotive temperature range. o o o o o o o o o o o o o
Features
400kbps 2-Wire Serial Interface 3V to 5.5V Operation Drive 4 Digits plus 4 or 8 Discrete LEDs Drive Common-Cathode LED Digits 23mA Constant-Current LED Segment Drive Hexadecimal Decode/No-Decode Digit Selection 64-Step Digital Brightness Control Slew-Rate-Limited Segment Drivers Reduced EMI Debounces Up to Eight Switches with n-Key Rollover (MAX6959 Only) IRQ Output When a Key Input Is Debounced (MAX6959 Only) 20A Low-Power Shutdown (Data Retained) Automotive Temperature Range (-40C to +125C) Compact 16-Pin PDIP and QSOP Packages
MAX6958/MAX6959
Ordering Information
PART TEMP RANGE SLAVE PINADDRESS PACKAGE 0111000 16 QSOP-EP*
MAX6958AAEE -40C to +125C
MAX6958AAPE -40C to +125C 0111000 16 DIP Ordering Information continued at end of data sheet.
*EP = Exposed pad.
Typical Operating Circuit
8
8
8
8
C
Applications
Set-Top Boxes Panel Meters White Goods Audio/Video Equipment Vending Machines Industrial Controls
SDA SCL IRQ
SDA SCL IRQ/SEG9
DIG0-DIG3 SEG0-SEG8
8 5V
V+
MAX6959
INPUT1 INPUT2 GND Key0 DIG0/SEG0 Key1 DIG1/SEG1 Key2 DIG2/SEG2 Key3 DIG3/SEG3 Key4 DIG4/SEG4 Key5 DIG5/SEG5 Key6 DIG6/SEG6 Key7 DIG7/SEG7
Pin Configuration, Functional Diagram, and Typical Application Circuit appear at end of data sheet.
SMBus is a trademark of Intel Corp. ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan MAX6958/MAX6959
ABSOLUTE MAXIMUM RATINGS
Voltage (with respect to GND) V+, SCL, SDA .......................................................-0.3V to +6V All Other Pins............................................-0.3V to (V+ + 0.3V) Current DIG0/SEG0-DIG3/SEG3 Sink Current ..........................275mA DIG0/SEG0-SEG9 Source Current .................................30mA SCL, SDA, INPUT1, INPUT2 ...........................................20mA Continuous Power Dissipation (TA = +70C) 16-Pin DIP (derate at 10.5mW/C above +70C) .........842mW 16-Pin QSOP (derate at 8.34mW/C above +70C).....667mW Operating Temperature Range MAX695_ (TMIN to TMAX) ...............................-40C to +125C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V+ = 3V to 5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 5V, TA = +25C.) (Note 1)
PARAMETER Operating Supply Voltage Shutdown Supply Current SYMBOL V+ ISHDN Shutdown mode, all digital inputs at V+ Intensity set to full, no display load connected, INPUT1 and INPUT2 open circuit 4 digits scanned VLED = 2.4V, V+ = 4.5V to 5.5V Segment Drive Source Current ISEG VLED = 2V, V+ = 3V to 5.5V TA = +25C TA = TMIN to +85C TA = +25C TA = TMIN to TMAX TA = TMIN to TMAX TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX 510 30.3 -19 -18 -16 -15.5 11 4 780 41 -23 5.9 CONDITIONS MIN 3 20 TYP MAX 5.5 50 125 6.7 mA UNITS V A
Operating Supply Current
I+
7.5
Display Scan Rate Keyscan Debounce Time
fSCAN tDEBOUNCE
1050 63 -29 -30 -29.5 -30.5
Hz ms
mA
Segment Current Slew Rate Segment Drive Current Matching LOGIC INPUTS AND OUTPUTS Input Leakage Current SCL and SDA Logic High Input Voltage SCL, SDA Logic Low Input Voltage SCL, SDA Input Leakage Current INPUT1, INPUT2 Logic High Input Voltage INPUT1, INPUT2 Logic Low Input Voltage INPUT1, INPUT2
ISEG/t ISEG
mA/s %
IIH, IIL VIH VIL IINH, IINL VINH VINL INPUT_ = V+
-1 2.1
+1
A V
0.8 -1 0.7 V+ 0.3 V+ +1
V A V V
2
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2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan
DC ELECTRICAL CHARACTERISTICS (continued)
(V+ = 3V to 5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 5V, TA = +25C.) (Note 1)
PARAMETER Pullup to V+ INPUT1, INPUT2 IRQ/SEG9, SDA Output Low Voltage SDA Output Low Voltage SYMBOL IPULLUP VOLBK VOL(SDA) ISINK = 6mA, TA = -40C to +85C ISINK = 4mA, TA = TMIN to TMAX ISINK = 6mA CONDITIONS MIN TYP 26.5 0.4 0.4 0.4 MAX UNITS A V V
MAX6958/MAX6959
TIMING CHARACTERISTICS
(V+ = 3V to 5.5V, TA = TMIN to TMAX, Figure 1, unless otherwise noted.) (Note 1)
PARAMETER Serial Clock Frequency Bus Free Time Between a STOP and a START Condition Hold Time (Repeated) START Condition Repeated START Setup Time STOP Condition Setup Time Data Hold Time Data Setup Time SCL Clock Low Period SCL Clock High Period Rise Time of Both SDA and SCL Signals, Receiving Fall Time of Both SDA and SCL Signals, Receiving Fall Time of SDA Transmitting Pulse Width of Spike Suppressed Capacitive Load for Each Bus Line SYMBOL fSCL tBUF tHD, STA tSU, STA tSU, STO tHD, DAT tSU, DAT tLOW tHIGH tR tF tF tSP CB (Notes 2, 4) (Notes 2, 4) (Notes 2, 5) (Note 6) (Note 3) 100 1.3 0.6 20 + 0.1CB 20 + 0.1CB 20 + 0.1CB 50 400 300 300 250 1.3 0.6 0.6 0.6 0.9 CONDITIONS MIN TYP MAX 400 UNITS kHz s s s s s ns s s ns ns ns ns pF
Note 1: All parameters tested at TA =+25C. Specifications over temperature are guaranteed by design. Note 2: Guaranteed by design. Note 3: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) in order to bridge the undefined region of SCL's falling edge. Note 4: CB = total capacitance of one bus line in pF. tR and tF measured between 0.3V+ and 0.7V+. Note 5: ISINK 6mA. CB = total capacitance of one bus line in pF. tR and tF measured between 0.3V+ and 0.7V+. Note 6: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
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2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan MAX6958/MAX6959
Typical Operating Characteristics
(V+ = 5V, LED forward voltage = 2.4V, TA = +25C, unless otherwise noted.)
SCAN RATE (fSCAN) vs. TEMPERATURE
MAX6958/59 toc01
KEYSCAN DEBOUNCE TIME (tDEBOUNCE) vs. TEMPERATURE
MAX6958/59 toc02
SCAN RATE (fSCAN) vs. SUPPLY VOLTAGE
MAX6958/59 toc03
800 795 790 SCAN RATE (Hz) 785 780 775 770 765 760 755 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C) 3V 4.5V 5V 5.5V
42.5 3V KEYSCAN DEBOUNCE TIME (ms) 42.0 4.5V 41.5 5V 5.5V 41.0
790 785 SCAN RATE (Hz) 780 775 770 765 760
40.5
40.0 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C)
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
KEYSCAN DEBOUNCE TIME (tDEBOUNCE) vs. SUPPLY VOLTAGE
MAX6958/59 toc04
SEGMENT SOURCE CURRENT vs. SUPPLY VOLTAGE
MAX6958/59 toc05
SEGMENT SOURCE CURRENT vs. SUPPLY VOLTAGE
MAX6958/59 toc06
42.2 42.0 KEYSCAN DEBOUNCE TIME (ms) 41.8 41.6 41.4 41.2 41.0 40.8 40.6 40.4 3.0 3.5 4.0 4.5 5.0
25 SEGMENT SOURCE CURRENT (mA)
25 SEGMENT SOURCE CURRENT (mA)
20
20
15
15
10
10
5 VLED = 2.4V 4.50 4.75 5.00 5.25 5.50
5 VLED = 2V 3.0 3.5 4.0 4.5 5.0 5.5
0 5.5 SUPPLY VOLTAGE (V)
0 SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
WAVEFORM AT DIG0/SEG0, FULL INTENSITY
MAX6958/59 toc07
INPUT PULLUP CURRENT vs. TEMPERATURE
40 INPUT PULLUP CURRENT (A) 35 30 25 20 15 10 5 0 3V 5.5V 5V 4.5V
MAX6958/59 toc08
45
VDIG0/
SEG0
1V/div 200s/div
-40
-20
0
20
40
60
80
100 120
TEMPERATURE (C)
4
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2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan
Pin Description
PIN MAX6958 1 2 3 -- MAX6959 1 2 -- 3 NAME SDA SCL SEG9 IRQ/SEG9 Serial Data I/O Serial Clock Input Segment Output. Segment driver sourcing current to a display anode. Interrupt or Segment Output. May be segment driver sourcing current to a display anode, or open-drain interrupt output, or open-drain logic output. Digit and Segment Drivers. Digit X outputs sink current from the display common cathode when acting as digit drivers. Segment X drivers source current to the display anodes. Segment/digit drivers are high impedance when turned off. Ground No Connect. Connect to V+ or leave open. General-Purpose Input Port 1 with Internal Pullup. May be configured as generalpurpose logic input or keyscan input. Connect to V+ or leave open if unused. General-Purpose Input Port 2 with Internal Pullup. May be configured as generalpurpose logic input or keyscan input. Connect to V+ or leave open if unused. Positive Supply Voltage FUNCTION
MAX6958/MAX6959
4-7, 11-15 8 9, 10 -- -- 16
4-7, 11-15 8 -- 9 10 16
DIGX, SEGX GND N.C. INPUT1 INPUT2 V+
Detailed Description
The MAX6958/MAX6959 serially interfaced display drivers drive up to: four 7-segment digits plus four discrete LEDs if the decimal points are used, or four 7-segment digits plus eight discrete LEDs if the decimal points are not used, or 36 discrete LEDs. Table 1 lists the display connection scheme. The MAX6958/MAX6959 include the hexadecimal font map for seven-segment displays. The seven-segment LED digits can be controlled directly or programmed to use the hexadecimal font. Direct segment control allows the MAX6958/MAX6959 to drive bar graphs and discrete LED indicators. The MAX6958/MAX6959 use a multiplexing scheme that minimizes the connections between the driver and LED display. The MAX6958/MAX6959 can drive monocolor and bicolor single-digit type displays, and monocolor dual-digit displays. Dual-digit displays internally wire together the equivalent segments for each digit, requiring only eight segment pins instead of 16. The
MAX6958/MAX6959 can also drive multidigit LED displays that have the segments individually pinned for each digit. To connect four single-digit displays to the MAX6958/ MAX6959, connect cathode outputs DIG0/SEG0- DIG3/SEG3 to the cathodes of the four display digits as shown in Table 1 (CC0-CC3). Drive eight additional LEDs with SEG0 to SEG7. Four of the eight LEDs can be the decimal point (DP) segments of the four displays, and the other four can be discrete LED indicators. To connect two dual-digit displays to the MAX6958/ MAX6959, connect cathode outputs DIG0/SEG0 and DIG1/SEG1 to the cathodes of the first dual digit. Connect DIG2/SEG2 and DIG3/SEG3 to the cathodes of the second dual digit. SEG0 to SEG3 can only drive discrete LEDs, not digit DP segments. SEG4 to SEG7 can drive the DP segments if required. Bicolor singledigit displays are connected and treated as dual-digit displays, each digit being one of the two colors.
Table 1. Standard Driver Connection to LED Displays
DIG0/SEG0 DIG1/SEG1 LED Digit 0 LED Digit 1 LED Digit 2 LED Digit 3 CC0 SEG 1 SEG g SEG g SEG 0 CC1 SEG f SEG f DIG2/SEG2 SEG g SEG g CC2 SEG 3 DIG3/SEG3 SEG f SEG f SEG 2 CC3 SEG 4 SEG e SEG e SEG e SEG e SEG 5 SEG d SEG d SEG d SEG d SEG 6 SEG c SEG c SEG c SEG c SEG 7 SEG b SEG b SEG b SEG b SEG 8 SEG a SEG a SEG a SEG a SEG 9/IRQ SEG 4 SEG 5 SEG 6 SEG 7
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2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan MAX6958/MAX6959
SDA tSU, DAT tLOW SCL tHD, STA tR START CONDITION tF REPEATED START CONDITION STOP START CONDITION CONDITION tHIGH tSU, STA tHD, DAT tHD, STA tSU, STO
tBUF
Figure 1. 2-Wire Serial Interface Timing Details
Differences Between MAX6958 and MAX6959
The MAX6958/MAX6959 have the same LED drive capability, four common-cathode digits of nine segments per digit. The MAX6959 additionally contains two logic input ports, INPUT1 and INPUT2. Each input port can be individually configured as either a general-purpose input port that is read through the serial interface, or as a keyscan input. In keyscan mode, the input is used to read and automatically debounce four key switches. A maximum of eight key switches can be read if both INPUT1 and INPUT2 are assigned to keyscanning. The MAX6958's SEG9 output is preconfigured as the 9th LED segment output. The IRQ/SEG9 output on the MAX6959 can be configured as either an open-drain logic output or the 9th segment output. This logic output serves as either a general-purpose logic output, set through the serial interface, or an interrupt (IRQ) output that alerts a microcontroller of debounced key-switch events. Key-switch status can also be obtained by polling the internal status registers at any time. Use the Option bit in the configuration register to detect whether a MAX6958 or MAX6959 is present. The option bit allows host software to establish whether a high-end front panel (using the MAX6959 for keyscan support) or a low-end panel (using a MAX6958 and no key switches) is fitted to a product.
The MAX6958/MAX6959 SDA line operates as both an input and an open-drain output. A pullup resistor, typically 4.7k, is required on the SDA bus. The MAX6958/ MAX6959 SCL line operates only as an input. A pullup resistor, typically 4.7k, is required on the SCL bus if there are multiple masters on the 2-wire interface, or if the master in a single-master system has an open-drain SCL output. Each transmission consists of a START condition (Figure 2) sent by a master, followed by the MAX6958/ MAX6959 7-bit slave address plus R/W bit (Figure 3), 1 or more data bytes, and finally a STOP condition (Figure 2). Start and Stop Conditions Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmission with a START (S) condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a STOP (P) condition by transitioning the SDA from low to high while SCL is high. The bus is then free for another transmission (Figure 2).
SDA
Serial Interface
Serial Addressing The MAX6958/MAX6959 operate as a slave that sends and receives data through a 2-wire interface. The interface uses a serial data line (SDA) and a serial clock line (SCL) to achieve bidirectional communication between master(s) and slave(s). A master, typically a microcontroller, initiates all data transfers to and from the MAX6958/MAX6959, and generates the SCL clock that synchronizes the data transfer (Figure 1).
6
SCL S START CONDITION P STOP CONDITION
Figure 2. Start and Stop Conditions
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2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan MAX6958/MAX6959
SDA 0 MSB SCL 1 1 1 0 0 A0 LSB R/W ACK
Figure 3. Slave Address
CLOCK PULSE FOR ACKNOWLEDGMENT
SDA
START CONDITION SCL 1 2
8 NOT ACKNOWLEDGE
9
SCL DATA STABLE, DATA VALID CHANGE OF DATA ALLOWED
SDA
ACKNOWLEDGE
Figure 4. Bit Transfer Figure 5. Acknowledge
Bit Transfer One data bit is transferred during each clock pulse. The data on the SDA line must remain stable while SCL is high (Figure 4). Acknowledge The acknowledge bit is a clocked 9th bit that the recipient uses to handshake receipt of each byte of data (Figure 5). Thus, each byte transferred effectively requires 9 bits. The master generates the 9th clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse, such that the SDA line is stable low during the high period of the clock pulse. When the master is transmitting to the MAX6958/MAX6959, the MAX6958/MAX6959 generate the acknowledge bit because the MAX6958/MAX6959 are the recipients. When the MAX6958/MAX6959 are transmitting to the master, the master generates the acknowledge bit because the master is the recipient. Slave Address The MAX6958/MAX6959 have a 7-bit-long slave address (Figure 3). The eighth bit following the 7-bit slave address is the R/W bit. Set the R/W bit low for a write command and high for a read command.
The MAX6958/MAX6959 are available in one of two possible slave addresses (see Table 2 and Ordering Information). The first 6 bits (MSBs) of the MAX6958/ MAX6959 slave address are always 011100. Slave address bit A0 is internally hardwired to either GND in the MAX695_A_, or V+ in the MAX695_B_. A maximum of two MAX6958/MAX6959 devices can share a bus.
Message Format for Writing
A write to the MAX6958/MAX6959 comprises the transmission of the MAX6958/MAX6959s' slave address with the R/W bit set to zero, followed by at least 1 byte of information. The first byte of information is the command byte, which determines the register that stores the next byte written to the MAX6958/MAX6959. If a STOP condition is detected after the command byte is received, the MAX6958/MAX6959 take no further action (Figure 6) beyond storing the command byte.
Table 2. MAX6958/MAX6959 Address Map
SLAVE ADDRESS BIT A0 MAX695_A_ MAX695_B_ MAX6958/MAX6959 DEVICE ADDRESS A6 0 0 A5 1 1 A4 1 1 A3 1 1 A2 0 0 A1 0 0 A0 0 1
COMMAND BYTE IS STORED ON RECEIPT OF STOP CONDITION ACKNOWLEDGE FROM MAX6958/MAX6959 S SLAVE ADDRESS R/W 0 A
D15
D14
D13
D12
D11
D10
D9
D8
COMMAND BYTE ACKNOWLEDGE FROM MAX6958/MAX6959
A
P
Figure 6. Command Byte Received _______________________________________________________________________________________ 7
2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan MAX6958/MAX6959
ACKNOWLEDGE FROM MAX6958/MAX6959 HOW CONTROL BYTE AND DATA BYTE MAP INTO MAX6958/MAX6959s' REGISTERS ACKNOWLEDGE FROM MAX6958/MAX6959 S SLAVE ADDRESS R/W 0 A D15 D14 D13 D12 D11 D10 D9 D8 ACKNOWLEDGE FROM MAX6958/MAX6959 D7 D6 D5 D4 D3 D2 D1 D0
COMMAND BYTE
A
DATA BYTE 1 BYTE
A
P
AUTOINCREMENT MEMORY WORD ADDRESS
Figure 7. Command and Single Data Byte Received
ACKNOWLEDGE FROM MAX6958/MAX6959 HOW CONTROL BYTE AND DATA BYTE MAP INTO MAX6958/MAX6959s' REGISTERS ACKNOWLEDGE FROM MAX6958/MAX6959 S SLAVE ADDRESS R/W 0 A D15 D14 D13 D12 D11 D10 D9 D8
ACKNOWLEDGE FROM MAX6958/MAX6959 D7 D6 D5 D4 D3 D2 D1 D0
COMMAND BYTE
A
DATA BYTE n BYTES
A
P
AUTOINCREMENT MEMORY WORD ADDRESS
Figure 8. n Data Bytes Received
ACKNOWLEDGE FROM THE MASTER HOW THE MAX6958/MAX6959 SENDS DATA TO THE MASTER ACKNOWLEDGE FROM MAX6958/MAX6959 S SLAVE ADDRESS R/W AUTOINCREMENT MEMORY WORD ADDRESS 1 A FIRST DATA BYTE A DATA BYTE n BYTES AUTOINCREMENT MEMORY WORD ADDRESS A P D15 D14 D13 D12 D11 D10 D9 D8 D7 NOT ACKNOWLEDGE FROM MASTER D6 D5 D4 D3 D2 D1 D0
Figure 9. Reading n Data Bytes from the MAX6958/MAX6959
Bytes received after the command byte are data bytes. The first data byte goes into the internal register of the MAX6958/MAX6959 as selected by the command byte (Figure 7). The address pointer in the MAX6958/MAX6959 autoincrements after each data byte. If multiple data bytes are transmitted before a STOP condition is detected, these bytes are stored in subsequent MAX6958/ MAX6959 internal registers (Figure 8), unless the address pointer has reached address 01111111. The address pointer does not autoincrement once address 01111111 has been reached (Table 3).
Message Format for Reading
The MAX6958/MAX6959 are read using the internally stored command byte as an address pointer the same way the stored command byte is used as an address pointer for a write. The pointer autoincrements after
8
each data byte read using the same rules as for a write (Table 3). A read is initiated by first configuring the MAX6958/MAX6959s' command byte with a write command (Figure 6). The master can now read n consecutive bytes from the MAX6958/MAX6959. The master acknowledges receipt of each read byte during the acknowledge clock pulse. The master must acknowledge all consecutive bytes received except the last byte. The final read byte must be followed by a not acknowledge from the master and then a stop condition (Figure 9). The first data byte is read from the register addressed by the initialized command byte (Figure 8). Reset the address pointer when performing read-after-write verification because the stored byte address is autoincremented after the write. The address pointer does not autoincrement if it points to register 01111111 (Table 3). Table 4 is the register address map.
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2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan
Table 3. Command Address Autoincrement Behavior
COMMAND BYTE ADDRESS RANGE 00000000 to 01111110 01111111 AUTOINCREMENT BEHAVIOR Command byte address autoincrements after byte read or written Command byte address remains at 01111111 after byte written or read
Command Address Autoincrementing
Address autoincrementing allows the MAX6958/ MAX6959 to be configured with the shortest number of transmissions by minimizing the number of times the command byte needs to be sent. The address pointer stored in the MAX6958/MAX6959 increments after each data byte is written or read, unless the address equals 01111111 (Table 3).
MAX6958/MAX6959
Digit Type Registers
The MAX6958/MAX6959 store display data in five registers. The four digit registers each control the seven numeric segments of a seven-segment digit, but not the DP segments. The segments register controls eight individual LEDs, which can be any mix of discrete LEDs and any or all of the DP segments of the four 7-segment digits (Table 5) (Figure 10).
a f g e d c dp b
Operation with Multiple Masters
If the MAX6958/MAX6959 are operated on a 2-wire interface with multiple masters, a master reading the MAX6958/MAX6959 should use a repeated start between the write, which sets the MAX6958/MAX6959s' address pointer, and the read(s) that takes the data from the location(s) set by the address pointer. It is possible for master 2 to take over the bus after master 1 has set up the MAX6958/MAX6959s' address pointer but before master 1 has read the data. If master 2 subsequently changes the MAX6958/MAX6959s' address pointer, then master 1's delayed read may be from an unexpected location.
Figure 10. Segment Labeling for 7-Segment Display
Table 4. Register Address Map
REGISTER No-op Decode mode Intensity Scan limit Configuration Factory reserved. Do not write to this register. GPIO (MAX6959 only) Display test Read key debounced (MAX6959 only) A write to this register is ignored. Read key pressed (MAX6959 only) A write to this register is ignored. Digit 0 Digit 1 Digit 2 Digit 3 Segments COMMAND ADDRESS D15 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D14 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D13 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 D12 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D11 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 D10 0 0 0 0 1 1 1 1 0 1 0 0 0 0 1 D9 0 0 1 1 0 0 1 1 0 0 0 0 1 1 0 D8 0 1 0 1 0 1 0 1 0 0 0 1 0 1 0 HEX CODE 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x0C 0x20 0x21 0x22 0x23 0x24
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2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan MAX6958/MAX6959
Table 5. No-Decode Mode Data Bits and Corresponding Segment Lines
DIGIT/SEGMENT REGISTER Digit 0 Digit 1 Digit 2 Digit 3 Segments ADDRESS CODE (HEX) 0x20 0x21 0x22 0x23 0x24 REGISTER DATA D7 X X X X SEG 7 D6 SEG a SEG a SEG a SEG a SEG 6 D5 SEG b SEG b SEG b SEG b SEG 5 D4 SEG c SEG c SEG c SEG c SEG 4 D3 SEG d SEG d SEG d SEG d SEG 3 D2 SEG e SEG e SEG e SEG e SEG 2 D1 SEG f SEG f SEG f SEG f SEG 1 D0 SEG g SEG g SEG g SEG g SEG 0
The digit registers and segments register use 1 bit to set the state of one segment. Each bit is high to turn a segment on, or low to turn it off (Table 6).
Table 6. No-Decode Mode Data Bits and Corresponding Segment Lines
REGISTER BIT 0 1 SEGMENT BEHAVIOR Segment off Segment on
In hexadecimal code-decode mode, the decoder looks only at the lower nibble of the data in the digit register (D3-D0), disregarding bits D7-D4. Table 7 lists the hexadecimal code font. When no decode is selected, data bits D7-D0 correspond to the segment lines of the MAX6958/MAX6959. Table 8 shows the one-to-one pairing of each data bit to the appropriate segment line.
Initial Power-Up
On initial power-up, all control registers are reset, the display is blanked, and the MAX6958/MAX6959 enter shutdown mode (Table 9). At power-up, the MAX6958/ MAX6959 are initially set to scan four digits, do not decode data in the digit registers or scan key switches (MAX6959 only), and the intensity register is set to a low value (4/64 intensity).
Decode-Mode Register
The decode-mode register sets hexadecimal code (0-9, A-F) or no-decode operation for each digit. Each bit in the register corresponds to one digit. Logic high selects hexadecimal decoding while logic low bypasses the decoder. Digits can be set for decode or no decode in any combination. Bit assignment and examples of the decode mode control register format are shown in Table 7.
Table 7. Decode-Mode Register Examples
DECODE MODE Bit assignment for each digit No decode for digits 3-0 Hexadecimal decode for digit 0; no decode for digits 3-1 -- Hexadecimal decode for digits 2-0; no decode for digit 3 Hexadecimal decode for digit 3; no decode for digits 2-0 -- Hexadecimal decode for digits 3-0 ADDRESS CODE (HEX) 0x01 0x01 0x01 -- 0x01 0x01 -- 0x01 REGISTER DATA D7 X X X -- X X -- X D6 X X X -- X X -- X D5 X X X -- X X -- X D4 X X X -- X X -- X D3 Digit 3 0 0 -- 0 1 -- 1 D2 Digit 2 0 0 -- 1 0 -- 1 D1 Digit 1 0 0 -- 1 0 -- 1 D0 Digit 0 0 1 -- 1 0 -- 1 HEX CODE -- 0xX0 0xX1 -- 0xX7 0xX8 -- 0xXF
10
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2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan MAX6958/MAX6959
Table 8. Seven-Segment Mapping Decoder for Hexadecimal Font
7-SEGMENT CHARACTER 0 1 2 3 4 5 6 7 8 9 A B C D E F REGISTER DATA D7-D4 X X X X X X X X X X X X X X X X D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 a 1 0 1 1 0 1 1 1 1 1 1 0 1 0 1 1 b 1 1 1 1 1 0 0 1 1 1 1 0 0 1 0 0 ON SEGMENTS = 1 c 1 1 0 1 1 1 1 1 1 1 1 1 0 1 0 0 d 1 0 1 1 0 1 1 0 1 1 0 1 1 1 1 0 e 1 0 1 0 0 0 1 0 1 0 1 1 1 1 1 1 f 1 0 0 0 1 1 1 0 1 1 1 1 1 0 1 1 g 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 1
Table 9. Initial Power-Up Register Status
REGISTER Decode mode Intensity Scan limit Configuration POWER-UP CONDITION No decode for digits 3-0 4/64 intensity Display 4 digits: 0 1 2 3 Shutdown enabled IRQ/SEG9 is a segment output (not IRQ or logic output); INPUT2 and INPUT1 are logic inputs; IRQ flag is clear Normal operation No key detected as pressed Blank digit (because not decoded) Blank digit (because not decoded) Blank digit (because not decoded) Blank digit (because not decoded) Blank segments ADDRESS CODE (HEX) 0x01 0x02 0x03 0x04 REGISTER DATA D7 X X X X D6 X X X X D5 X 0 X 0 D4 X 0 X X D3 0 0 X X D2 0 1 X X D1 0 0 1 D bit D0 0 0 1 0
GPIO*
0x06
1
0
0
0
0
X
X
0
Display test Key pressed* Digit 0 Digit 1 Digit 2 Digit 3 Segments
0x07 0x08 0x0C 0x20 0x21 0x22 0x23 0x24
X 0 0 X X X X 0
X 0 0 0 0 0 0 0
X 0 0 0 0 0 0 0
X 0 0 0 0 0 0 0
X 0 0 0 0 0 0 0
X 0 0 0 0 0 0 0
X 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
Key debounced* No key detected as debounced
*MAX6959 only.
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11
2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan MAX6958/MAX6959
Configuration Register
Use the configuration register to enter and exit shutdown, check device type, and globally clear the digit data (Tables 10-13). The S bit selects shutdown or normal operation (read/write). The D bit reports whether the device is a MAX6958 or a MAX6959 (read only). The R bit clears all the digit and segment data (data is not stored-transient bit) scanned. Since the number of scanned digits affects the display brightness, the scan-limit register should not be used to blank portions of the display (such as leading zero suppression).
Intensity Register
An internal pulse-width modulator controlled by the intensity register provides digital control of display brightness. The modulator scales the average segment current in 63 steps from a maximum of 63/64 down to 1/64 of the 23mA peak current. The minimum interdigit blanking time is set to 1/64 of a cycle (Figure 11 and Table 15).
Scan-Limit Register
The scan-limit register sets the number of digits displayed, from one to four (Table 14). A bicolor digit is connected as two monocolor digits. The scan-limit register also limits the number of keys that can be
Table 10. Configuration Register Format
MODE Configuration register ADDRESS CODE (HEX) 0x04 REGISTER DATA D7 X D6 X D5 R D4 X D3 X D2 X D1 D D0 S
Table 11. Shutdown Control (S Data Bit D0) Format
MODE Shutdown mode Normal operation ADDRESS CODE (HEX) 0x04 0x04 REGISTER DATA D7 X X D6 X X D5 R R D4 X X D3 X X D2 X X D1 D D D0 0 1
Table 12. Device Readback (D Data Bit D1) Format
MODE MAX6958 MAX6959 ADDRESS CODE (HEX) 0x04 0x04 REGISTER DATA D7 X X D6 X X D5 R R D4 X X D3 X X D2 X X D1 0 1 D0 S S
Table 13. Global Clear Digit Data (R Data Bit D5) Format
MODE Digit and segment data are unaffected Digit and segment data are cleared ADDRESS CODE (HEX) 0x04 0x04 REGISTER DATA D7 X X D6 X X D5 0 1 D4 X X D3 X X D2 X X D1 D D D0 S S
Table 14. Scan-Limit Register Format
SCAN LIMIT Display digit 0 and segments 0, 4 Display digits 0, 1 and segments 0, 1, 4, 5 Display digits 0, 1, 2 and segments 0, 1, 2, 4, 5, 6 Display digits 0, 1, 2, 3 and segments 0, 1, 2, 3, 4, 5, 6, 7 ADDRESS CODE (HEX) 0x03 0x03 0x03 0x03 REGISTER DATA D7 X X X X D6 X X X X D5 X X X X D4 X X X X D3 X X X X D2 X X X X D1 0 0 1 1 D0 0 1 0 1 HEX CODE 0xX0 0xX1 0xX2 0xX3
12
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2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan MAX6958/MAX6959
Table 15. Global Intensity Register Format
DUTY CYCLE 1/64 (min on) 2/64 3/64 4/64 5/64 6/64 -- 60/64 61/64 62/64 63/64 63/64 (max on) TYPICAL SEGMENT CURRENT (mA) 0.36 0.72 1.08 1.44 1.80 2.16 -- 21.56 21.92 22.28 22.64 22.64 ADDRESS CODE (HEX) 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 D7 X X X X X X X X X X X X D6 X X X X X X X X X X X X D5 0 0 0 0 0 0 -- 1 1 1 1 1 D4 0 0 0 0 0 0 -- 1 1 1 1 1 D3 0 0 0 0 0 0 -- 1 1 1 1 1 D2 0 0 0 0 1 1 -- 0 1 1 1 1 D1 0 0 1 1 0 0 -- 1 0 0 1 1 D0 0 1 0 1 0 1 -- 1 0 1 0 1 HEX CODE 0x00 0x01 0x02 0x03 0x04 0x05 -- 0x3B 0x3C 0x3D 0x3E 0x3F
START OF NEXT CYCLE
ONE COMPLETE 1.28ms MULTIPLEX CYCLE AROUND 4 DIGITS DIGIT 0 DIGIT 1 DIGIT 2 DIGIT 3
DIGIT 0
DIGIT 0 CATHODE DRIVER INTENSITY SETTINGS LOW 1/64th (MIN ON) 2/64th 3/64th LOW
DIGIT 0's 320s MULTIPLEX TIMESLOT HIGH-Z HIGH-Z HIGH-Z LOW
HIGH-Z 61/64th 62/16th 63/64th 63/64th (MAX ON) LOW HIGH-Z LOW HIGH-Z LOW HIGH-Z LOW MINIMUM 5s INTERDIGIT BLANKING INTERVAL ANODE (LIT) HIGH-Z ANODE (UNLIT) HIGH-Z CURRENT SOURCE ENABLED HIGH-Z
HIGH-Z
Figure 11. Multiplex Timing Diagram ______________________________________________________________________________________ 13
2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan MAX6958/MAX6959
Ports and Key Scanning (MAX6959 Only)
The MAX6959 features two input ports, INPUT1 and INPUT2. These two ports can be used as general-purpose logic inputs, or configured to perform automatic keyscanning. Both ports have internal pullup resistors enabled in shutdown and normal operation for both general-purpose input mode and keyscanning mode. The ports can be read using the 2-wire interface. The keyscan logic uses one or both of the INPUT1 and INPUT2 logic inputs (Figure 12). An interrupt output that flags key presses is optional. The interrupt flag can be read (polled) through the serial interface instead, allowing IRQ/SEG9 to be used as an open-drain generalpurpose logic output or as a segment driver. One small-signal diode is required per key switch when more than one key is connected to INPUT1 or INPUT2. The diodes prevent two simultaneous key switch depressions from shorting digit drivers together. For example, if KEY0 and KEY1 were pressed together (Figure 12) and the diodes were not fitted, DIG0/SEG0 and DIG1/SEG1 would be shorted together and the LED multiplexing would be incorrect. These diodes can be common-anode dual diodes in SOT23 like BAW56. A diode is not required for a single key connection to INPUT1 or INPUT2. Therefore, up to two key switches can be automatically debounced without adding diodes (Figure 13). Resistors R1 and R2 are required if the MAX6959 is operated with V+ greater than 4V. R1 and R2 are optional if V+ is between 3V and 4V. The keyscanning circuit utilizes the LED's commoncathode driver outputs as the keyscan drivers. The outputs DIG0/SEG0 to DIG3/SEG3 pulse low for nominally 320s sequentially as the displays are multiplexed. The actual low time varies from 5s to 315s due to pulsewidth modulation from 1/64th to 63/64th for intensity control. The timing diagram (Figure 14) shows the typical situation when all four LED cathode drivers are used. The maximum eight keys can be scanned only if the scan-limit register is set to scan the maximum four digits. If fewer than four digits are driven, then only (2 x n) switches can be scanned, where n is the number of digits (1, 2, 3, or 4) set in the scan-limit register (Table 14). The keyscan cycle loops continuously over time, with all eight keys experiencing a full keyscanning debounce over 41ms (Figure 14). A key press is debounced and an interrupt issued if at least one key that was not pressed in a previous cycle is found pressed during both sampling periods. The keyscan circuit detects any combination of keys pressed during each debounce cycle (n-key rollover).
Port Configuration Register (MAX6959 Only)
The port configuration register configures INPUT1, INPUT2, and IRQ/SEG9 ports for the MAX6959 (Table 16). IRQ/SEG9 can be set to either an LED segment output (driving four multiplexed LED segments), or an opendrain logic output. The open-drain logic output can be configured as either an IRQ output controlled by the keyscan circuitry, or as a general-purpose logic output controlled through the 2-wire interface. Connect a
DIG0/SEG0 Key0 DIG1/SEG1 Key1 DIG2/SEG2 Key2 DIG3/SEG3 Key3 V+ INPUT1 INPUT2 IRQ/SEG9 MICROCONTROLLER INTERRUPT R1 39k R2 39k V+ Key7 Key6 Key5 Key4
DIG0/SEG0
Key4 Key0
V+ INPUT1 INPUT2 IRQ/SEG9
4.7k
R1 39k R2 39k V+ 4.7k
MICROCONTROLLER INTERRUPT
Figure 12. Maximum Keyscan Configuration 14
Figure 13. Keyscanning Two Keys Without Diodes
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2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan MAX6958/MAX6959
tDEBOUNCE THE FIRST HALF OF A 41ms KEYSCAN CYCLE 1.28ms MULTIPLEX CYCLE 1 1.28ms MULTIPLEX 1.28ms MULTIPLEX 1.28ms MULTIPLEX CYCLE 2 CYCLE 3 CYCLE 4 1.28ms MULTIPLEX CYCLE 15 THE SECOND HALF OF A 41ms KEYSCAN CYCLE 1.28ms MULTIPLEX 1.28ms MULTIPLEX 1.28ms MULTIPLEX CYCLE 16 CYCLE 1 CYCLE 2 1.28ms MULTIPLEX 1.28ms MULTIPLEX CYCLE 15 CYCLE 16
5s TO 315s DIGIT PERIOD DIG0/SEG0 DIG1/SEG1 DIG2/SEG2 DIG3/SEG3 INPUT1 Key0 Key1 Key2 Key3 INPUT2 Key4 Key5 Key6 Key7 A B Key0 Key1 Key2 Key3 Key4 Key5 Key6 Key7 C D E A FIRST TEST OF KEYS SECOND TEST OF KEYS INTERRUPT ASSERTED IF REQUIRED KEY DEBOUNCED REGISTER UPDATED START OF NEXT KEYSCAN CYCLE
Figure 14. Keyscan Timing Diagram
pullup resistor from IRQ/SEG9 to a voltage no greater than 5.5V when configuring IRQ/SEG9 as an interrupt or logic output. INPUT1 and INPUT2 can be individually configured as either general-purpose logic inputs or as keyscan inputs. In either mode, the input structure is the same-- CMOS logic inputs with internal pullup resistors. The
pullups are always enabled, even in shutdown. Ensure these inputs are either close to V+ or open circuit for minimum shutdown supply current. If both INPUT1 and INPUT2 are assigned to keyscan, then eight keys can be debounced. If only INPUT1 or INPUT2 is assigned to keyscan, then only four keys can be debounced.
Table 16. Port Configuration Register Format
MODE This is the bit assignment: Read GPIO register 0x06 Read back Read back IRQ/SEG9 INPUT 2 configuration configuration Configure IRQ/SEG9 output Configure INPUT 2: 0 = logic input 1 = keyscan 0 1 0 1 X X X X X X Read back INPUT 1 configuration Configure INPUT 1: 0 = logic input 1 = keyscan X X X X X INPUT2 logic level INPUT1 logic level IRQ status (1 = interrupt) ADDRESS CODE (HEX) REGISTER DATA D7 D6 D5 D4 D3 D2 D1 D0
Write GPIO register
0x06
X
X
X
Here are the IRQ/SEG9 allocation options, determined by the settings of D7, D6, D5: IRQ/SEG9 is logic 0 output IRQ/SEG9 is logic 1 output IRQ/SEG9 is active-low IRQ IRQ/SEG9 is active-high IRQ IRQ/SEG9 is segment driver 0x06 0x06 0x06 0x06 0x06 0 0 0 0 1 0 0 1 1 X X X X X X X X X X X X X X X X
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15
2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan
Key Debounced Register (MAX6959 Only) The key debounced register shows which keys have been detected as debounced by the keyscanning circuit (Table 17). Each bit in the register corresponds to one key switch. The bit is set to 1 if the switch has been correctly debounced since the last key debounced register read operation. Reading the key debounced register clears the register (after the data has been read) so that future key presses can be identified. If the key debounced register is not read, the keyscan data accumulates. There is no FIFO register in the MAX6959. Key-press order, or whether a key has been pressed more than once, cannot be determined unless the key debounced register is read after each interrupt and before completion of the next keyscan cycle. Reading the key debounced register clears the IRQ output. If a key is pressed and held down, the key is reported as debounced (and an IRQ is issued) only once. The key must be detected as released by the keyscanning circuit before it is debounced again. The key debounced register is read only. A write to address 0x08 is ignored. Key Pressed Register (MAX6959 Only) The key pressed register shows which keys have been detected as pressed by the keyscanning circuit during the last test. Each bit in the register corresponds to one key switch. The bit is set if the switch has been detected as pressed by the keyscanning circuit during the last test. The bit is cleared if the switch has not been
MAX6958/MAX6959
detected as pressed by the keyscanning circuit during the last test. Reading the key pressed register does not clear either the key pressed register, or the key debounced register, and does not clear the IRQ output. The key pressed register is read only. A write to address 0x0C is ignored.
Display Test Register
The display test register operates in two modes: normal and display test (Table 19). Display test mode turns on all LEDs by overriding, but not altering, all control and digit registers (including the shutdown register) except for the port configuration register. The duty cycle while in display test mode is 28/64.
Applications Information
Driving Bicolor LEDs
Bicolor digits combine a red and a green die for each display element, so that the element displays red or green (or orange), depending on which die (or both) is lit. The MAX6958/MAX6959 treat a bicolor digit as two monocolor digits.
Low-Voltage Operation
The MAX6958/MAX6959 are guaranteed to drive a 23mA segment current into 2.4V (or lower) LEDs when operated from a supply voltage of 4.5V to 5.5V. Operating the MAX6958/MAX6959 from a supply voltage lower than 4.5V reduces the LED drive current. The drivers drive at least 15.5mA segment current into 2V (or lower) LEDs when operated from a 3V supply voltage.
Table 17. Key Debounced Register Format
KEY DEBOUNCED REGISTER Key debounced register ADDRESS CODE (HEX) D7 0x08 Key7 REGISTER DATA WITH APPROPRIATE SWITCH NAMED BELOW D6 Key6 D5 Key5 D4 Key4 D3 Key3 D2 Key2 D1 Key1 D0 Key0
Table 18. Key Pressed Register Format
KEY PRESSED REGISTER Key pressed register ADDRESS CODE (HEX) D7 0x0C Key7 REGISTER DATA WITH APPROPRIATE SWITCH NAMED BELOW D6 Key6 D5 Key5 D4 Key4 D3 Key3 D2 Key2 D1 Key1 D0 Key0
Table 19. Display Test Register
MODE Normal operation Display test mode ADDRESS CODE (HEX) 0x07 0x07 REGISTER DATA D7 X X D6 X X D5 X X D4 X X D3 X X D2 X X D1 X X D0 0 1
16
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2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan
Computing Power Dissipation
Determine the MAX6958/MAX6959 upper-limit power dissipation (PD) with the following equation: PD = (V+ I+) + (V+ - VLED) (DUTY ISEG N) where: V+ = supply voltage I+ = operating supply current DUTY = duty cycle set by intensity register N = number of segments driven (worst case is nine) VLED = LED forward voltage at ISEG ISEG = peak segment current PD = power dissipation, in mW if currents are in mA Dissipation example: Therefore, TA = +87.9C. For a 16-pin DIP package (TJA = 1/0.0105 = +95.2C/W from Absolute Maximum Ratings), the maximum allowed ambient temperature TA is given by: TJ(MAX) = TA + (PD TJA) = +150C = TA + (0.652 95.2C/W)
MAX6958/MAX6959
Power Supplies
The MAX6958/MAX6959 operate from a single 3V to 5.5V power supply. Bypass V+ with a 0.1F capacitor to GND, as close to the device as possible. Bypass V+ with an additional 10F capacitor if the MAX6958/ MAX6959 are not close to the board input's bulk decoupling capacitor.
Chip Information
ISEG = 23mA, N = 9, DUTY = 63/64, VLED = 2.2V, V+ = 5.25V PD = 5.25V (5.9mA) + (5.25V - 2.2V) (63/64 23mA 9) = 0.652W TRANSISTOR COUNT: 17,340 PROCESS: CMOS
Ordering Information (continued)
PART MAX6958BAEE MAX6958BAPE MAX6959AAPE MAX6959BAEE MAX6959BAPE TEMP RANGE -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C SLAVE PINADDRESS PACKAGE 0111001 0111001 0111000 0111000 0111001 0111001 16 QSOP 16 DIP 16 QSOP 16 DIP 16 QSOP 16 DIP
PWM INTENSITY CONTROL CURRENT REFERENCE IRQ MULTIPLEX OSCILLATOR
Functional Diagram
PORTS AND KEYSCAN
KEYSCAN AND PORT CONTROL
MAX6959AAEE -40C to +125C
LED DRIVER
4 LED DIGITS
MULTIPLEX LOGIC
CONFIGURATION REGISTERS SDA SCL
DISPLAY RAM AND HEX ROM
2-WIRE SERIAL INTERFACE
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17
2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan MAX6958/MAX6959
Pin Configuration
TOP VIEW
SDA 1 SCL 2 (IRQ/SEG9) SEG9 3 DIG0/SEG0 4 DIG1/SEG1 5 DIG2/SEG2 6 DIG3/SEG3 7 GND 8 16 V+ 15 SEG8 14 SEG7 9 9 9 9
Typical Application Circuit
MAX6958/ MAX6959
13 SEG6 12 SEG5 11 SEG4 10 (INPUT2)/N.C. 9 (INPUT1)/N.C.
C SDA SCL SDA SCL DIG0-DIG3 SEG0-SEG9 9 5V
MAX6959
INPUT1 INPUT2 39k 39k
V+ 0.1F GND
QSOP/DIP
( ) MAX6959 ONLY
Key0 DIG0/SEG0 Key1 DIG1/SEG1 Key2 DIG2/SEG2 Key3 DIG3/SEG3 Key4 DIG0/SEG0 Key5 DIG1/SEG1 Key6 DIG2/SEG2 Key7 DIG3/SEG3
18
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2-Wire Interfaced, 3V to 5.5V, 4-Digit, 9-Segment LED Display Drivers with Keyscan
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
QSOP,EXP. PADS.EPS
MAX6958/MAX6959
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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